RandomFailure

Title:   Object selection using hit test tracks

Patent application publication number:  20070019889

Publication date:  January 25, 2007

Filing date:  July 31, 2006 (priority to November 12, 1991)

Link to PDF: 

AIPW Summary:  A method for selecting objects from a video track. The user selects a visual area of a single frame and the pixels in the selected visual area are labeled. The labeled pixels are mapped to an item buffer, which is stored in memory with the image frame. By labeling the pixels in the selected area, when the user selects a pixel in a subsequent image frame, the entire selected area can be readily located and an action can be performed relating to the selected area.

Side note: This application is an oldie - there’s a reference to HyperCard (last released in 1998) in paragraph 0003. There are still some references to HyperCard over at the Apple Developer Connection.

Title:   Method and apparatus for media data transmission

Patent application publication number:  20070022215

Publication date:  January 25, 2007

Filing date:  July 18, 2006 (priority to July 19, 2005)

Link to PDF: 

AIPW Summary:  A method for preparing and transmitting (preferably in packet form) of time related sequences of media data, i.e., the QuickTime file format. This file format uses and manipulates meta-data, which is then used to map to the associated media data. “Hints” for packetizing a sequence of the media data are created and can be stored separately from the media data. A hint is an executable instruction for the server to packetize a portion of the media data (see paragraph 0086). The packetized media data is then sent to an intended recipient.

Title:   Computer interface having a virtual single-layer mode for viewing overlapping objects

Patent application publication number:  20070022389

Publication date:  January 25, 2007

Filing date:  September 11, 2006 (priority to June 20, 2003)

Link to PDF: 

AIPW Summary:  A method for being able to see all of the open windows in a GUI screen, even if some of the windows initially overlap each other (see Figure 3). The individual windows are arranged and resized to be able to be viewed in their entirety (see Figure 5); the claims recite that only at least a portion of each window needs to be visible. The transition between the two modes can be gradually performed, so as to appear animated (one example intermediate view is shown in Figure 4). After all of the windows are displayed, the user selects an active window, and the windows return to their original locations and sizes, with the active window on top. The fact that window contents are buffered in the display driver makes this method efficient, without requiring access to the running applications (see paragraph 0037).

Title:  Glass support member

Type:  issued patent

Patent number:  7,165,362

Issue date:  January 23, 2007

Filing date:  July 8, 2003 (priority to July 15, 2002)

Link to PDF: 

AIPW Summary:  This seems like one of those highly incongruous things - who’d expect a patent on stairs from a computer/consumer electronics company? Regardless, it’s here, and I don’t really have a special category for it. Anyway, this patent is about stair construction (in a specific example), and uses several layers of glass held together by bonding layers with spaces cut out to fit a connector (see the exploded view in Figure 2). This type of patent is nice and easy to follow, as compared to some of the computer science and EE-heavy applications we usually see.

Title:  Graphical user interface and methods of use thereof in a multimedia player

Type:  issued patent

Patent number:  7,166,791

Issue date:  January 23, 2007

Filing date:  October 28, 2002

Link to PDF: 

AIPW Summary:  This patent is about the iPod user interface and its hierarchical menu structure. The claims are directed to a media player with a rotational input device and at least a two-level hierarchical menu structure.

Title:  Method and apparatus for simulating a mechanical keyboard action in an electronic keyboard

Type:  issued patent

Patent number:  7,166,795

Issue date:  January 23, 2007

Filing date:  March 19, 2004

Link to PDF: 

AIPW Summary:  An electronic keyboard that simulates the keyboard of a piano or organ. Sensors capture a user’s finger movements on the electronic keyboard (which includes an actuator) and simulates the effects (both sounds and feedback) that would have occurred on a real piano or organ keyboard. The electronic keyboard can be programmed to simulate a variety of different musical keyboard types, including specific models of piano.

Title:  Deferred shading graphics pipeline processor having advanced features

Type:  issued patent

Patent number:  7,167,181

Issue date:  January 23, 2007

Filing date:  June 9, 2003 (priority to August 20, 1998)

Link to PDF:    (Be warned: this is a 398 page monster.)

AIPW Summary:  This patent describes a 3D graphics processor including numerous specialized substructures, such as a deferred shading processor pipeline. The processor implements shading, anti-aliasing, texture mapping, and bump mapping. The claims are directed to performing a fragment operation on a per-pixel basis.

At 398 pages (221 drawing sheets), there’s quite a lot going on here. This patent is has ten related cases, so this patent family is quite extensive.

Title:  Accessories providing a telephone conference application one or more capabilities independent of the teleconference application

Type:  issued patent

Patent number:  7,167,897

Issue date:  January 23, 2007

Filing date:  May 8, 1996 (No, that is not a typo. This case was pending a long time. The term extension is 875 days (about 2 years and 5 months).)

Link to PDF: 

AIPW Summary:  This patent relates to a teleconferencing application. The application has a base component which is usable by most computers. Additional features (such as file transfer, etc.) can be used at any station participating in the teleconference, and their use is separate from the teleconference application and can be invoked without affecting the teleconference.

Side note: This case is old enough that the specification (at column 5, lines 3-16) refers to a Mac 8100 (March 1994 - July 1995; see Apple-History.com for more info) and a Symantec C++ compiler (which, best I can tell, hasn’t been around since 1997 or so).

Title: Centralized queue in network printing systems

Type: issued patent

Patent number: 7,167,930

Issue date: January 23, 2007

Filing date: September 12, 2003 (priority back to June 6, 1995)

Link to PDF:

AIPW Summary: A centralized queue for a network printing system allows users to add print jobs to the queue without transmitting the acutal print job to the network, by storing print job information in the queue and leaving the actual job data at the host computer. The patent describes an imaging device protocol (IDP) to manage the print queue and to arbitrate among the jobs in the queue. See Figure 3 for an overview of how the IDP fits into the networking scheme. The claims of this patent relate to requesting the print job data from the host computer when the print job reaches the top of the queue.

See related U.S. Patent Nos. 6,401,150; 6,502,147; and 6,687,776 for additional information.

Title:  Method and apparatus for a calibrated variable phase offset timing between synchronous clock subdomains

Type:  issued patent

Patent number:  7,167,966

Issue date:  January 23, 2007

Filing date:  August 16, 2004

Link to PDF: 

AIPW Summary:  A hardware-related patent that relates to calibrating time parameters between hardware elements based on how the system is actually performing. A clock signal generator is coupled to multiple hardware subsystems and supplies clock signals to each subsystem. The clock signal generator can supply a different clock signal to each subsystem, all of the clock signals being derived from a common clock, each clock signal having a different predetermined phase offset relative to the other clock signals. The phase offsets are adjustable based on the performance of the hardware subsystems. The patent describes various ways of determining performance of the hardware subsystems and when to adjust the clock phase offsets.